Phase 2: Building custom Schedulers
đź§ The Mission
Transitioning from simple Super-Loop architectures to a deterministic, Multi-threaded Preemptive Kernel. This phase focuses on the “under the hood” mechanics of how an OS manages the CPU.
đź› Core Objectives
1. Context Switching
Mastering the transition between tasks by manually saving and restoring CPU registers using the PendSV exception.
2. Priority Management
- Scheduling Logic: Implementing Fixed-Priority and Round-Robin algorithms.
- Priority Inversion: Simulating the “Unbounded Priority Inversion” bug and implementing Priority Inheritance as a professional-grade fix.
3. Memory Safety & Analysis
- Stack Guard Bands: Implementing magic-number watermarking to detect stack growth.
- MPU Integration: Using the Memory Protection Unit to trigger a
HardFaulton stack overflows.
🚀 Key Milestones
- The Custom Scheduler: A “from-scratch” implementation on the STM32L475.
- Multicore Concepts: Introduction to SMP (Symmetric Multiprocessing) and Spinlocks.